We had a busy, but enjoyable time at the International Symposium on FPGAs. It is always great to visit the beautiful Monterey Peninsula.

The festivities started on Sunday, when Dustin Richmond, Ryan Kastner, Jeff Goeders, and Mirjana Stojilović organized the Third Workshop on Security for Custom Computing Machines (SCCM) on Sunday. This hybrid event had 30+ people in person and another 30+ online. The presentations have all been posted on the SCCM website, which also has videos from last year. As part of this, Colin Drewes gave the first public presentation of our Pentimenti project, which describes a novel temporal analog side channel in FPGAs.

Point Lobos State National Reserve

On Monday, Colin presented his UCSD MS research developing a time-to-digital converter (TDC) for FPGA security applications. TDCs are common sensors for measuring the on-chip voltage and inferring behaviors of other system tenants. Our Tunable Dual-Polarity TDC (repo, paper) can hone in on important times in the computation, e.g., around clock transitions, and extract more information about co-tenant computations. The project was one of the three best paper nominations. Unfortunately, we did not get the best paper, but we are honored to be in the top three. The research was a strong, multi-university collaboration between UC Santa Cruz, UC San Diego, and Georgia Tech Research Institute. Congrats to all the authors!

On Tuesday, Olivia Weng presented her research on co-design optimizations for implementing neural networks on FPGAs. This research is part of the Tailor project, which performs network architecture modifications that remove or shorten skip connections to optimize on-chip memory architectures.

NSF CSGrad4US Fellowship

Andres (Andy) Meza was awarded a 2022 National Science Foundation Computer and Information Science and Engineering (CISE) Graduate Fellowship (CSGrad4US). CSGrad4US “aims to increase the number and diversity of domestic graduate students pursuing research and innovation careers.”

Andy is a Research and Development Staff in our group working on hardware security and ML hardware acceleration. He plays a critical role in much of our group’s research. These include hardware security verification projects with industry (Intel, Cycuity, OpenTitan, Leidos, the Semiconductor Research Corporation) and academia (Cynthia Sturton’s group and Calvin Deutschbein). As if this isn’t enough, he also works on the hls4ml project on topics related MLPerf Tiny benchmarks and fault tolerance. To date, he has seven(!) publications at top venues with several more in submission.

Andy started with our group as an undergraduate. After graduation, he continued working on research projects and moved into his R&D staff role. Andy is applying for Ph.D. programs and will undoubtedly continue his research career as a Ph.D. student starting next academic year. We hope he stays at UCSD!

Congrats Andy on this well-deserved honor!

Prof. Dustin Richmond Starts at UC Santa Cruz

Kastner Research Group alum Dustin Richmond started as an assistant professor in the Department of Computer Science and Engineering at UC Santa Cruz this Fall. Dustin got his Ph.D. in 2018 and spent a few years as a post-doc at the University of Washington.

For those of you that are keeping count, that means Dustin has transformed from a Husky (undergraduate) to a Triton (Ph.D.), back to a Husky (post-doc), and now a Banana Slug?! Clearly, he likes the West Coast.

While he has been gone for awhile, he is certainly not forgotten. We have continued to work with Dustin (and now his new research group) on projects related to FPGA security.

Dustin thinking about how one day he will be a banana slug.

Dustin in the much easier, carefree days of graduate school.

Colin Drewes: An Award-Winning Master Researcher

Congratulations to Colin Drewes for being awarded the 2022 UCSD Department of Computer Science and Engineering MS Research Award. Colin worked in our research group for almost three years – first as a CS undergraduate and during the past year as an CSE MS student. He was the de factor leader on one of our major research projects – a large multi-institution project between UCSD, University of Washington, and Georgia Tech Research Institute. The results of this project are an impressive string of publications (a couple still pending). Colin continues his graduate career as PhD student at Stanford University working with Caroline Trippel starting this Fall. Colin – you will be missed. Best of luck at Stanford!

Colin appears around the 15 second mark

RAGE Best Presentation Award

Congratulations to Andy Meza for giving the best presentation at the Real-Time and Intelligent Edge Computing Workshop co-located with the Design Automation Conference. Andy presented our research on “Safety Verification of Third-Party Hardware Modules via Information Flow Tracking” a collaborative project with Francesco Restuccia and Jason Oberg from Cycuity. The work describes how to use information flow tracking to verify the safety of bus interactions among on-chip hardware resources.

Dr. Peter Tueller Rocks His PhD

A long overdue congratulations to Dr. Peter Tueller for successfully defending his Ph.D.

Peter joined our group in Fall 2016 despite me doing one of the worst recruiting jobs ever. He was doing outstanding undergraduate research to build a fleet of underwater vehicles. Around the same time, we were developing localization algorithms for swarms of underwater vehicles. It seemed like a perfect fit! I saw his UCSD graduate application many times — several colleagues forwarded it to me saying that I should make sure not to miss it. At the time I was on a sabbatical and not looking to take on more students. After the third or fourth time of someone telling me I should check out his application, I finally got around to it. I made him a very late offer, which was right before visit day. I asked if he could come and stick around another day so that I could meet him as I was traveling during the official visit days (again, I wasn’t planning on taking students that year).

Our first meeting still sticks in my mind. We met up at a taco restaurant in La Jolla Shores. I figured I didn’t have much of a shot at convincing him to come to UCSD. I was apologizing for making a late offer, not being a visit day, etc., but also trying my best to convince him that I was still really interested in working with him. I was doing a terrible job of recruiting him. But he rather nonchalantly stated that he was planning to come to UCSD. Lucky me!

Peter had a Ph.D. career that I will forever be jealous of. He spent a couple of months at the University of Haifa in Israel working with Roee Diamant on an underwater sonar project. He made expeditions to Guatemala to perform 3D scanning at the archaeological sites of El Zotz and Tikal. He worked most summers at NIWC Pacific developing different underwater technologies. He was the leader and driving force behind getting the FishSense project up and running. He got a SMART scholarship that allowed him to pursue Ph.D. research largely of his choosing related to 3D vision systems. This allowed him to move directly into a job at NIWC after graduation, which was what he wanted to do all along.

And all of this was done as a second career to being a rock star.

Despite being a rock star, Peter was a cool and calming influence on our group. I always looked forward to our weekly meetings — great research discussion and lots of laughs. He was a tremendous mentor to undergraduates and the other new members of our research group.

Congrats Dr. Tueller! You will be missed. Keep on rocking!

Engineering a Smarter Surfboard

The Smartfin project was highlighted in a ThisWeek@UCSD article. The Smartfin holds a microcontroller, temperature sensor, inertial measurement unit, and wireless radio — all embedded into a surfboard fin. This allows surfers to opportunistically gather oceanographic data in the near-shore environment, which is otherwise challenging for more traditionally sensors on buoys and moorings. Engineers for Exploration students are working this summer as part of the NSF-funded REU Site to solidify the data collection process, and develop in-house ability to manufacture Smartfins in a low-cost and open-source manner.

Exploiting the AMBA AXI Protocol for Denial of Service Attacks

Francesco Restuccia was invited to give a talk at the June 2022 edition of — a conference dedicated towards showcasing novel hardware attacks and training the security community to defend against those attacks. Francesco’s talk details how the popular on-chip communication protocol is prone to attacks against the security and safety of on-chip resources. The attacks take advantage of inadequacies in the protocol, which was developed for high-speed communications, and not necessarily designed with safety and security in mind. For more details, check out his talk in its entiretly.

Scaling Hardware Security Property Generation

One of the biggest challenges in hardware security verification is developing formal properties that can subsequently be verified by automated tools. This is a difficult and time-consuming task typically assigned to security verification engineers that must manually sort through hundreds of thousands of lines of a hardware description.

Isadora Duncan By Arnold Genthe -, Public Domain,

Our recent article in IEEE Security & Privacy Special Issue on Formal Methods at Scale describes our research on developing Isadora – a tool that automates the property generation process for information-flow properties that are critical to the security of hardware designs. Isadora combines information flow tracking with specification mining to help automate the challenging security verification process. Congrats to the authors: Calvin Deutschbein, Andy Meza, Francesco Restuccia, Ryan Kastner, and Cynthia Sturton.

Olivia Weng Named NSF Graduate Research Fellow

Congratulations to Olivia Weng for being awarded a National Science Foundation Graduate Research Fellowship. The NSF GRF is one of the most prestigious graduate fellowships in the US. The fellowship will fund Liv for the remainder of her PhD allowing her to continue her research on the co-design of efficient, fault-tolerant computer architectures for applications in high-energy physics. One example is the Large Hadron Collider, where physicists need hardware that will process millions of particle collisions per second. Her research will allow their hardware, and the machine learning software that runs on it, to meet these intense computing demands while handing faults that are inherent in such sensors.