Power side-channel attacks are a means to extract privileged information, such as secret cryptographic keys, from computational hardware by measuring the subtle variations in voltage drop during the times when the secret data is being computed upon. This is a remarkably simple and effective way to recover secret information using low-cost test equipment.

Our recent research with computer engineers at UW and architects at UCSB brought together hardware design, computer architecture, and statistics to identify and programmatically “blink” the processor when the most information leakage occurs. While blinking, the processor is disconnected from the main power supply and running from an internal capacitor, so that attackers cannot obtain information from measurements of voltage drop during those times. We also explore the trade-offs between area overhead and security, introduce a technique for determining if obvious information leakage exists at processor design time, and a statistical approach to localize this leakage.

These ideas are detailed in our paper, “Hiding Intermittent Information Leakage with Architectural Support for Blinking,” which is being presented at the International Symposium on Computer Architecture (ISCA) in June 2018. Have a look at our two-minute lightning talk to get a better idea of how employ hardware blinking to make it more secure against to side channel leakage.

“The best book is a finished book” – Anyone that has written a book

Stephen Neuendorffer (Xilinx), Janarbek Matai (Cognex), and I recently “published” the open-source book “Parallel Programming for FPGAs“, which describes how to effectively use high-level synthesis (HLS) tools to program field programmable gate arrays (FPGAs). High-level synthesis is the process of taking an application written in procedural code (e.g., written as C code) and translating it into a hardware design (e.g., like one written in Verilog). HLS tools are seeing a growing usage in the industry as commercial offerings like Xilinx Vivado HLS become more sophisticated. Yet, these tools require the user to understand parallel programming concepts like data partitioning, pipelining, and task level parallelism. These are non-trivial ideas that often are not covered in a programming course. The book aims to clearly explain these concepts while walking through the design and optimization of different applications.

Don’t understand this? Read our book!

The book is open-source with the hope that it will be a living book. We can quickly and easily fix typos, grammar, and poorly written sections. And we can add new materials. You can probably expect at least minor updates during the times when I’m using the book to teach 237C (typically Fall Quarter). We are very open to receiving contributions of new materials, e.g., additions to existing chapters, new chapters, projects, labs, slides, etc.. We would be happy to provide an appropriate level of attribution (e.g., as a chapter author?). Get in touch with me if you are interested in contributing.

Like anything worth doing, this took a lot longer than anticipated (like 5 years longer!), but I am happy to say that we finally got this manuscript into good enough shape to call it version 1.0. Thanks to Steve for making the final push earlier this year. Janarbek was instrumental in providing a lot of the code examples (certainly for all the chapters that I wrote). Much of this came from his PhD thesis and work as a TA for 237C. And a very special thanks to Xilinx for their funding and immense patience on this. They provided no strings attached funding to my lab to allow my PhD students to work on various aspects of this project. I was also able to leverage incredible support through the Wireless Embedded Systems Masters Program (to fund TAs to work specifically on developing the labs and other teaching materials). I know that everyone would have liked this a lot sooner, but I hope that you will agree that this is better late than never?

We have an associated set of projects that we developed alongside this book over the course of many years in my 237C classes. Cleaning up and releasing these projects will likely be the next major revision to the book. I hope to release them broadly this Fall (no promises especially given my track record on getting this book out in a timely manner!). In the meantime, feel free to get in touch with me if you want to have a look at them.

-Ryan

Related Press: Hackaday