Power side-channel attacks are a means to extract privileged information, such as secret cryptographic keys, from computational hardware by measuring the subtle variations in voltage drop during the times when the secret data is being computed upon. This is a remarkably simple and effective way to recover secret information using low-cost test equipment.

Our recent research with computer engineers at UW and architects at UCSB brought together hardware design, computer architecture, and statistics to identify and programmatically “blink” the processor when the most information leakage occurs. While blinking, the processor is disconnected from the main power supply and running from an internal capacitor, so that attackers cannot obtain information from measurements of voltage drop during those times. We also explore the trade-offs between area overhead and security, introduce a technique for determining if obvious information leakage exists at processor design time, and a statistical approach to localize this leakage.

These ideas are detailed in our paper, “Hiding Intermittent Information Leakage with Architectural Support for Blinking,” which is being presented at the International Symposium on Computer Architecture (ISCA) in June 2018. Have a look at our two-minute lightning talk to get a better idea of how employ hardware blinking to make it more secure against to side channel leakage.