#ifndef INCLUDED_CYFITTER_H
#define INCLUDED_CYFITTER_H
#include "cydevice.h"

/* USBUART_1_bus_reset */
#define USBUART_1_bus_reset__INTC_CLR_EN_REG CYDEV_NVIC_CLRENA0
#define USBUART_1_bus_reset__INTC_CLR_PD_REG CYDEV_NVIC_CLRPEND0
#define USBUART_1_bus_reset__INTC_MASK 0x4000000u
#define USBUART_1_bus_reset__INTC_NUMBER 26
#define USBUART_1_bus_reset__INTC_PRIOR_NUM 7
#define USBUART_1_bus_reset__INTC_PRIOR_REG CYDEV_NVIC_PRI_26
#define USBUART_1_bus_reset__INTC_SET_EN_REG CYDEV_NVIC_SETENA0
#define USBUART_1_bus_reset__INTC_SET_PD_REG CYDEV_NVIC_SETPEND0

/* USBUART_1_arb_int */
#define USBUART_1_arb_int__INTC_CLR_EN_REG CYDEV_NVIC_CLRENA0
#define USBUART_1_arb_int__INTC_CLR_PD_REG CYDEV_NVIC_CLRPEND0
#define USBUART_1_arb_int__INTC_MASK 0x400000u
#define USBUART_1_arb_int__INTC_NUMBER 22
#define USBUART_1_arb_int__INTC_PRIOR_NUM 7
#define USBUART_1_arb_int__INTC_PRIOR_REG CYDEV_NVIC_PRI_22
#define USBUART_1_arb_int__INTC_SET_EN_REG CYDEV_NVIC_SETENA0
#define USBUART_1_arb_int__INTC_SET_PD_REG CYDEV_NVIC_SETPEND0

/* USBUART_1_ord_int */
#define USBUART_1_ord_int__INTC_CLR_EN_REG CYDEV_NVIC_CLRENA0
#define USBUART_1_ord_int__INTC_CLR_PD_REG CYDEV_NVIC_CLRPEND0
#define USBUART_1_ord_int__INTC_MASK 0x2000000u
#define USBUART_1_ord_int__INTC_NUMBER 25
#define USBUART_1_ord_int__INTC_PRIOR_NUM 7
#define USBUART_1_ord_int__INTC_PRIOR_REG CYDEV_NVIC_PRI_25
#define USBUART_1_ord_int__INTC_SET_EN_REG CYDEV_NVIC_SETENA0
#define USBUART_1_ord_int__INTC_SET_PD_REG CYDEV_NVIC_SETPEND0

/* USBUART_1_sof_int */
#define USBUART_1_sof_int__INTC_CLR_EN_REG CYDEV_NVIC_CLRENA0
#define USBUART_1_sof_int__INTC_CLR_PD_REG CYDEV_NVIC_CLRPEND0
#define USBUART_1_sof_int__INTC_MASK 0x200000u
#define USBUART_1_sof_int__INTC_NUMBER 21
#define USBUART_1_sof_int__INTC_PRIOR_NUM 7
#define USBUART_1_sof_int__INTC_PRIOR_REG CYDEV_NVIC_PRI_21
#define USBUART_1_sof_int__INTC_SET_EN_REG CYDEV_NVIC_SETENA0
#define USBUART_1_sof_int__INTC_SET_PD_REG CYDEV_NVIC_SETPEND0

/* USBUART_1_ep_0 */
#define USBUART_1_ep_0__INTC_CLR_EN_REG CYDEV_NVIC_CLRENA0
#define USBUART_1_ep_0__INTC_CLR_PD_REG CYDEV_NVIC_CLRPEND0
#define USBUART_1_ep_0__INTC_MASK 0x20000000u
#define USBUART_1_ep_0__INTC_NUMBER 29
#define USBUART_1_ep_0__INTC_PRIOR_NUM 7
#define USBUART_1_ep_0__INTC_PRIOR_REG CYDEV_NVIC_PRI_29
#define USBUART_1_ep_0__INTC_SET_EN_REG CYDEV_NVIC_SETENA0
#define USBUART_1_ep_0__INTC_SET_PD_REG CYDEV_NVIC_SETPEND0

/* USBUART_1_ep_1 */
#define USBUART_1_ep_1__INTC_CLR_EN_REG CYDEV_NVIC_CLRENA0
#define USBUART_1_ep_1__INTC_CLR_PD_REG CYDEV_NVIC_CLRPEND0
#define USBUART_1_ep_1__INTC_MASK 0x40000000u
#define USBUART_1_ep_1__INTC_NUMBER 30
#define USBUART_1_ep_1__INTC_PRIOR_NUM 7
#define USBUART_1_ep_1__INTC_PRIOR_REG CYDEV_NVIC_PRI_30
#define USBUART_1_ep_1__INTC_SET_EN_REG CYDEV_NVIC_SETENA0
#define USBUART_1_ep_1__INTC_SET_PD_REG CYDEV_NVIC_SETPEND0

/* USBUART_1_ep_2 */
#define USBUART_1_ep_2__INTC_CLR_EN_REG CYDEV_NVIC_CLRENA0
#define USBUART_1_ep_2__INTC_CLR_PD_REG CYDEV_NVIC_CLRPEND0
#define USBUART_1_ep_2__INTC_MASK 0x80000000u
#define USBUART_1_ep_2__INTC_NUMBER 31
#define USBUART_1_ep_2__INTC_PRIOR_NUM 7
#define USBUART_1_ep_2__INTC_PRIOR_REG CYDEV_NVIC_PRI_31
#define USBUART_1_ep_2__INTC_SET_EN_REG CYDEV_NVIC_SETENA0
#define USBUART_1_ep_2__INTC_SET_PD_REG CYDEV_NVIC_SETPEND0

/* USBUART_1_ep_3 */
#define USBUART_1_ep_3__INTC_CLR_EN_REG CYDEV_NVIC_CLRENA0
#define USBUART_1_ep_3__INTC_CLR_PD_REG CYDEV_NVIC_CLRPEND0
#define USBUART_1_ep_3__INTC_MASK 0x10000000u
#define USBUART_1_ep_3__INTC_NUMBER 28
#define USBUART_1_ep_3__INTC_PRIOR_NUM 7
#define USBUART_1_ep_3__INTC_PRIOR_REG CYDEV_NVIC_PRI_28
#define USBUART_1_ep_3__INTC_SET_EN_REG CYDEV_NVIC_SETENA0
#define USBUART_1_ep_3__INTC_SET_PD_REG CYDEV_NVIC_SETPEND0

/* USBUART_1_ep_4 */
#define USBUART_1_ep_4__INTC_CLR_EN_REG CYDEV_NVIC_CLRENA0
#define USBUART_1_ep_4__INTC_CLR_PD_REG CYDEV_NVIC_CLRPEND0
#define USBUART_1_ep_4__INTC_MASK 0x10000u
#define USBUART_1_ep_4__INTC_NUMBER 16
#define USBUART_1_ep_4__INTC_PRIOR_NUM 7
#define USBUART_1_ep_4__INTC_PRIOR_REG CYDEV_NVIC_PRI_16
#define USBUART_1_ep_4__INTC_SET_EN_REG CYDEV_NVIC_SETENA0
#define USBUART_1_ep_4__INTC_SET_PD_REG CYDEV_NVIC_SETPEND0

/* USBUART_1_ep_5 */
#define USBUART_1_ep_5__INTC_CLR_EN_REG CYDEV_NVIC_CLRENA0
#define USBUART_1_ep_5__INTC_CLR_PD_REG CYDEV_NVIC_CLRPEND0
#define USBUART_1_ep_5__INTC_MASK 0x800000u
#define USBUART_1_ep_5__INTC_NUMBER 23
#define USBUART_1_ep_5__INTC_PRIOR_NUM 7
#define USBUART_1_ep_5__INTC_PRIOR_REG CYDEV_NVIC_PRI_23
#define USBUART_1_ep_5__INTC_SET_EN_REG CYDEV_NVIC_SETENA0
#define USBUART_1_ep_5__INTC_SET_PD_REG CYDEV_NVIC_SETPEND0

/* USBUART_1_ep_6 */
#define USBUART_1_ep_6__INTC_CLR_EN_REG CYDEV_NVIC_CLRENA0
#define USBUART_1_ep_6__INTC_CLR_PD_REG CYDEV_NVIC_CLRPEND0
#define USBUART_1_ep_6__INTC_MASK 0x02u
#define USBUART_1_ep_6__INTC_NUMBER 1
#define USBUART_1_ep_6__INTC_PRIOR_NUM 7
#define USBUART_1_ep_6__INTC_PRIOR_REG CYDEV_NVIC_PRI_1
#define USBUART_1_ep_6__INTC_SET_EN_REG CYDEV_NVIC_SETENA0
#define USBUART_1_ep_6__INTC_SET_PD_REG CYDEV_NVIC_SETPEND0

/* USBUART_1_ep_7 */
#define USBUART_1_ep_7__INTC_CLR_EN_REG CYDEV_NVIC_CLRENA0
#define USBUART_1_ep_7__INTC_CLR_PD_REG CYDEV_NVIC_CLRPEND0
#define USBUART_1_ep_7__INTC_MASK 0x01u
#define USBUART_1_ep_7__INTC_NUMBER 0
#define USBUART_1_ep_7__INTC_PRIOR_NUM 7
#define USBUART_1_ep_7__INTC_PRIOR_REG CYDEV_NVIC_PRI_0
#define USBUART_1_ep_7__INTC_SET_EN_REG CYDEV_NVIC_SETENA0
#define USBUART_1_ep_7__INTC_SET_PD_REG CYDEV_NVIC_SETPEND0

/* USBUART_1_ep_8 */
#define USBUART_1_ep_8__INTC_CLR_EN_REG CYDEV_NVIC_CLRENA0
#define USBUART_1_ep_8__INTC_CLR_PD_REG CYDEV_NVIC_CLRPEND0
#define USBUART_1_ep_8__INTC_MASK 0x1000000u
#define USBUART_1_ep_8__INTC_NUMBER 24
#define USBUART_1_ep_8__INTC_PRIOR_NUM 7
#define USBUART_1_ep_8__INTC_PRIOR_REG CYDEV_NVIC_PRI_24
#define USBUART_1_ep_8__INTC_SET_EN_REG CYDEV_NVIC_SETENA0
#define USBUART_1_ep_8__INTC_SET_PD_REG CYDEV_NVIC_SETPEND0

/* USBUART_1_USB */
#define USBUART_1_USB__ARB_CFG CYDEV_USB_ARB_CFG
#define USBUART_1_USB__ARB_EP1_CFG CYDEV_USB_ARB_EP1_CFG
#define USBUART_1_USB__ARB_EP1_INT_EN CYDEV_USB_ARB_EP1_INT_EN
#define USBUART_1_USB__ARB_EP1_SR CYDEV_USB_ARB_EP1_SR
#define USBUART_1_USB__ARB_EP2_CFG CYDEV_USB_ARB_EP2_CFG
#define USBUART_1_USB__ARB_EP2_INT_EN CYDEV_USB_ARB_EP2_INT_EN
#define USBUART_1_USB__ARB_EP2_SR CYDEV_USB_ARB_EP2_SR
#define USBUART_1_USB__ARB_EP3_CFG CYDEV_USB_ARB_EP3_CFG
#define USBUART_1_USB__ARB_EP3_INT_EN CYDEV_USB_ARB_EP3_INT_EN
#define USBUART_1_USB__ARB_EP3_SR CYDEV_USB_ARB_EP3_SR
#define USBUART_1_USB__ARB_EP4_CFG CYDEV_USB_ARB_EP4_CFG
#define USBUART_1_USB__ARB_EP4_INT_EN CYDEV_USB_ARB_EP4_INT_EN
#define USBUART_1_USB__ARB_EP4_SR CYDEV_USB_ARB_EP4_SR
#define USBUART_1_USB__ARB_EP5_CFG CYDEV_USB_ARB_EP5_CFG
#define USBUART_1_USB__ARB_EP5_INT_EN CYDEV_USB_ARB_EP5_INT_EN
#define USBUART_1_USB__ARB_EP5_SR CYDEV_USB_ARB_EP5_SR
#define USBUART_1_USB__ARB_EP6_CFG CYDEV_USB_ARB_EP6_CFG
#define USBUART_1_USB__ARB_EP6_INT_EN CYDEV_USB_ARB_EP6_INT_EN
#define USBUART_1_USB__ARB_EP6_SR CYDEV_USB_ARB_EP6_SR
#define USBUART_1_USB__ARB_EP7_CFG CYDEV_USB_ARB_EP7_CFG
#define USBUART_1_USB__ARB_EP7_INT_EN CYDEV_USB_ARB_EP7_INT_EN
#define USBUART_1_USB__ARB_EP7_SR CYDEV_USB_ARB_EP7_SR
#define USBUART_1_USB__ARB_EP8_CFG CYDEV_USB_ARB_EP8_CFG
#define USBUART_1_USB__ARB_EP8_INT_EN CYDEV_USB_ARB_EP8_INT_EN
#define USBUART_1_USB__ARB_EP8_SR CYDEV_USB_ARB_EP8_SR
#define USBUART_1_USB__ARB_INT_EN CYDEV_USB_ARB_INT_EN
#define USBUART_1_USB__ARB_INT_SR CYDEV_USB_ARB_INT_SR
#define USBUART_1_USB__ARB_RW1_DR CYDEV_USB_ARB_RW1_DR
#define USBUART_1_USB__ARB_RW1_RA CYDEV_USB_ARB_RW1_RA
#define USBUART_1_USB__ARB_RW1_RA_MSB CYDEV_USB_ARB_RW1_RA_MSB
#define USBUART_1_USB__ARB_RW1_WA CYDEV_USB_ARB_RW1_WA
#define USBUART_1_USB__ARB_RW1_WA_MSB CYDEV_USB_ARB_RW1_WA_MSB
#define USBUART_1_USB__ARB_RW2_DR CYDEV_USB_ARB_RW2_DR
#define USBUART_1_USB__ARB_RW2_RA CYDEV_USB_ARB_RW2_RA
#define USBUART_1_USB__ARB_RW2_RA_MSB CYDEV_USB_ARB_RW2_RA_MSB
#define USBUART_1_USB__ARB_RW2_WA CYDEV_USB_ARB_RW2_WA
#define USBUART_1_USB__ARB_RW2_WA_MSB CYDEV_USB_ARB_RW2_WA_MSB
#define USBUART_1_USB__ARB_RW3_DR CYDEV_USB_ARB_RW3_DR
#define USBUART_1_USB__ARB_RW3_RA CYDEV_USB_ARB_RW3_RA
#define USBUART_1_USB__ARB_RW3_RA_MSB CYDEV_USB_ARB_RW3_RA_MSB
#define USBUART_1_USB__ARB_RW3_WA CYDEV_USB_ARB_RW3_WA
#define USBUART_1_USB__ARB_RW3_WA_MSB CYDEV_USB_ARB_RW3_WA_MSB
#define USBUART_1_USB__ARB_RW4_DR CYDEV_USB_ARB_RW4_DR
#define USBUART_1_USB__ARB_RW4_RA CYDEV_USB_ARB_RW4_RA
#define USBUART_1_USB__ARB_RW4_RA_MSB CYDEV_USB_ARB_RW4_RA_MSB
#define USBUART_1_USB__ARB_RW4_WA CYDEV_USB_ARB_RW4_WA
#define USBUART_1_USB__ARB_RW4_WA_MSB CYDEV_USB_ARB_RW4_WA_MSB
#define USBUART_1_USB__ARB_RW5_DR CYDEV_USB_ARB_RW5_DR
#define USBUART_1_USB__ARB_RW5_RA CYDEV_USB_ARB_RW5_RA
#define USBUART_1_USB__ARB_RW5_RA_MSB CYDEV_USB_ARB_RW5_RA_MSB
#define USBUART_1_USB__ARB_RW5_WA CYDEV_USB_ARB_RW5_WA
#define USBUART_1_USB__ARB_RW5_WA_MSB CYDEV_USB_ARB_RW5_WA_MSB
#define USBUART_1_USB__ARB_RW6_DR CYDEV_USB_ARB_RW6_DR
#define USBUART_1_USB__ARB_RW6_RA CYDEV_USB_ARB_RW6_RA
#define USBUART_1_USB__ARB_RW6_RA_MSB CYDEV_USB_ARB_RW6_RA_MSB
#define USBUART_1_USB__ARB_RW6_WA CYDEV_USB_ARB_RW6_WA
#define USBUART_1_USB__ARB_RW6_WA_MSB CYDEV_USB_ARB_RW6_WA_MSB
#define USBUART_1_USB__ARB_RW7_DR CYDEV_USB_ARB_RW7_DR
#define USBUART_1_USB__ARB_RW7_RA CYDEV_USB_ARB_RW7_RA
#define USBUART_1_USB__ARB_RW7_RA_MSB CYDEV_USB_ARB_RW7_RA_MSB
#define USBUART_1_USB__ARB_RW7_WA CYDEV_USB_ARB_RW7_WA
#define USBUART_1_USB__ARB_RW7_WA_MSB CYDEV_USB_ARB_RW7_WA_MSB
#define USBUART_1_USB__ARB_RW8_DR CYDEV_USB_ARB_RW8_DR
#define USBUART_1_USB__ARB_RW8_RA CYDEV_USB_ARB_RW8_RA
#define USBUART_1_USB__ARB_RW8_RA_MSB CYDEV_USB_ARB_RW8_RA_MSB
#define USBUART_1_USB__ARB_RW8_WA CYDEV_USB_ARB_RW8_WA
#define USBUART_1_USB__ARB_RW8_WA_MSB CYDEV_USB_ARB_RW8_WA_MSB
#define USBUART_1_USB__BUF_SIZE CYDEV_USB_BUF_SIZE
#define USBUART_1_USB__BUS_RST_CNT CYDEV_USB_BUS_RST_CNT
#define USBUART_1_USB__CR0 CYDEV_USB_CR0
#define USBUART_1_USB__CR1 CYDEV_USB_CR1
#define USBUART_1_USB__CWA CYDEV_USB_CWA
#define USBUART_1_USB__CWA_MSB CYDEV_USB_CWA_MSB
#define USBUART_1_USB__DMA_THRES CYDEV_USB_DMA_THRES
#define USBUART_1_USB__DMA_THRES_MSB CYDEV_USB_DMA_THRES_MSB
#define USBUART_1_USB__EP_ACTIVE CYDEV_USB_EP_ACTIVE
#define USBUART_1_USB__EP_TYPE CYDEV_USB_EP_TYPE
#define USBUART_1_USB__EP0_CNT CYDEV_USB_EP0_CNT
#define USBUART_1_USB__EP0_CR CYDEV_USB_EP0_CR
#define USBUART_1_USB__EP0_DR0 CYDEV_USB_EP0_DR0
#define USBUART_1_USB__EP0_DR1 CYDEV_USB_EP0_DR1
#define USBUART_1_USB__EP0_DR2 CYDEV_USB_EP0_DR2
#define USBUART_1_USB__EP0_DR3 CYDEV_USB_EP0_DR3
#define USBUART_1_USB__EP0_DR4 CYDEV_USB_EP0_DR4
#define USBUART_1_USB__EP0_DR5 CYDEV_USB_EP0_DR5
#define USBUART_1_USB__EP0_DR6 CYDEV_USB_EP0_DR6
#define USBUART_1_USB__EP0_DR7 CYDEV_USB_EP0_DR7
#define USBUART_1_USB__MEM_DATA CYDEV_USB_MEM_DATA_MBASE
#define USBUART_1_USB__OSCLK_DR0 CYDEV_USB_OSCLK_DR0
#define USBUART_1_USB__OSCLK_DR1 CYDEV_USB_OSCLK_DR1
#define USBUART_1_USB__PM_ACT_CFG CYDEV_PM_ACT_CFG5
#define USBUART_1_USB__PM_ACT_MSK 0x01u
#define USBUART_1_USB__PM_STBY_CFG CYDEV_PM_STBY_CFG5
#define USBUART_1_USB__PM_STBY_MSK 0x01u
#define USBUART_1_USB__SIE_EP_INT_EN CYDEV_USB_SIE_EP_INT_EN
#define USBUART_1_USB__SIE_EP_INT_SR CYDEV_USB_SIE_EP_INT_SR
#define USBUART_1_USB__SIE_EP1_CNT0 CYDEV_USB_SIE_EP1_CNT0
#define USBUART_1_USB__SIE_EP1_CNT1 CYDEV_USB_SIE_EP1_CNT1
#define USBUART_1_USB__SIE_EP1_CR0 CYDEV_USB_SIE_EP1_CR0
#define USBUART_1_USB__SIE_EP2_CNT0 CYDEV_USB_SIE_EP2_CNT0
#define USBUART_1_USB__SIE_EP2_CNT1 CYDEV_USB_SIE_EP2_CNT1
#define USBUART_1_USB__SIE_EP2_CR0 CYDEV_USB_SIE_EP2_CR0
#define USBUART_1_USB__SIE_EP3_CNT0 CYDEV_USB_SIE_EP3_CNT0
#define USBUART_1_USB__SIE_EP3_CNT1 CYDEV_USB_SIE_EP3_CNT1
#define USBUART_1_USB__SIE_EP3_CR0 CYDEV_USB_SIE_EP3_CR0
#define USBUART_1_USB__SIE_EP4_CNT0 CYDEV_USB_SIE_EP4_CNT0
#define USBUART_1_USB__SIE_EP4_CNT1 CYDEV_USB_SIE_EP4_CNT1
#define USBUART_1_USB__SIE_EP4_CR0 CYDEV_USB_SIE_EP4_CR0
#define USBUART_1_USB__SIE_EP5_CNT0 CYDEV_USB_SIE_EP5_CNT0
#define USBUART_1_USB__SIE_EP5_CNT1 CYDEV_USB_SIE_EP5_CNT1
#define USBUART_1_USB__SIE_EP5_CR0 CYDEV_USB_SIE_EP5_CR0
#define USBUART_1_USB__SIE_EP6_CNT0 CYDEV_USB_SIE_EP6_CNT0
#define USBUART_1_USB__SIE_EP6_CNT1 CYDEV_USB_SIE_EP6_CNT1
#define USBUART_1_USB__SIE_EP6_CR0 CYDEV_USB_SIE_EP6_CR0
#define USBUART_1_USB__SIE_EP7_CNT0 CYDEV_USB_SIE_EP7_CNT0
#define USBUART_1_USB__SIE_EP7_CNT1 CYDEV_USB_SIE_EP7_CNT1
#define USBUART_1_USB__SIE_EP7_CR0 CYDEV_USB_SIE_EP7_CR0
#define USBUART_1_USB__SIE_EP8_CNT0 CYDEV_USB_SIE_EP8_CNT0
#define USBUART_1_USB__SIE_EP8_CNT1 CYDEV_USB_SIE_EP8_CNT1
#define USBUART_1_USB__SIE_EP8_CR0 CYDEV_USB_SIE_EP8_CR0
#define USBUART_1_USB__SOF0 CYDEV_USB_SOF0
#define USBUART_1_USB__SOF1 CYDEV_USB_SOF1
#define USBUART_1_USB__USB_CLK_EN CYDEV_USB_USB_CLK_EN
#define USBUART_1_USB__USBIO_CR0 CYDEV_USB_USBIO_CR0
#define USBUART_1_USB__USBIO_CR1 CYDEV_USB_USBIO_CR1
#define USBUART_1_USB__USBIO_CR2 CYDEV_USB_USBIO_CR2

/* USBUART_1_dm */
#define USBUART_1_dm__0__MASK 0x80u
#define USBUART_1_dm__0__PC CYDEV_IO_PC_PRT15_PC7
#define USBUART_1_dm__0__PORT 15
#define USBUART_1_dm__0__SHIFT 7
#define USBUART_1_dm__AG CYDEV_IO_PRT_PRT15_AG
#define USBUART_1_dm__AMUX CYDEV_IO_PRT_PRT15_AMUX
#define USBUART_1_dm__BIE CYDEV_IO_PRT_PRT15_BIE
#define USBUART_1_dm__BIT_MASK CYDEV_IO_PRT_PRT15_BIT_MASK
#define USBUART_1_dm__BYP CYDEV_IO_PRT_PRT15_BYP
#define USBUART_1_dm__CTL CYDEV_IO_PRT_PRT15_CTL
#define USBUART_1_dm__dm__MASK 0x80u
#define USBUART_1_dm__dm__PC CYDEV_IO_PC_PRT15_PC7
#define USBUART_1_dm__dm__PORT 15
#define USBUART_1_dm__dm__SHIFT 7
#define USBUART_1_dm__DM0 CYDEV_IO_PRT_PRT15_DM0
#define USBUART_1_dm__DM1 CYDEV_IO_PRT_PRT15_DM1
#define USBUART_1_dm__DM2 CYDEV_IO_PRT_PRT15_DM2
#define USBUART_1_dm__DR CYDEV_IO_PRT_PRT15_DR
#define USBUART_1_dm__INP_DIS CYDEV_IO_PRT_PRT15_INP_DIS
#define USBUART_1_dm__LCD_COM_SEG CYDEV_IO_PRT_PRT15_LCD_COM_SEG
#define USBUART_1_dm__LCD_EN CYDEV_IO_PRT_PRT15_LCD_EN
#define USBUART_1_dm__PORT 15
#define USBUART_1_dm__PRT CYDEV_IO_PRT_PRT15_PRT
#define USBUART_1_dm__PRTDSI__CAPS_SEL CYDEV_PRTDSI_PRT15_CAPS_SEL
#define USBUART_1_dm__PRTDSI__DBL_SYNC_IN CYDEV_PRTDSI_PRT15_DBL_SYNC_IN
#define USBUART_1_dm__PRTDSI__OE_SEL0 CYDEV_PRTDSI_PRT15_OE_SEL0
#define USBUART_1_dm__PRTDSI__OE_SEL1 CYDEV_PRTDSI_PRT15_OE_SEL1
#define USBUART_1_dm__PRTDSI__OUT_SEL0 CYDEV_PRTDSI_PRT15_OUT_SEL0
#define USBUART_1_dm__PRTDSI__OUT_SEL1 CYDEV_PRTDSI_PRT15_OUT_SEL1
#define USBUART_1_dm__PRTDSI__SYNC_OUT CYDEV_PRTDSI_PRT15_SYNC_OUT
#define USBUART_1_dm__PS CYDEV_IO_PRT_PRT15_PS
#define USBUART_1_dm__SLW CYDEV_IO_PRT_PRT15_SLW

/* USBUART_1_dp */
#define USBUART_1_dp__0__MASK 0x40u
#define USBUART_1_dp__0__PC CYDEV_IO_PC_PRT15_PC6
#define USBUART_1_dp__0__PORT 15
#define USBUART_1_dp__0__SHIFT 6
#define USBUART_1_dp__AG CYDEV_IO_PRT_PRT15_AG
#define USBUART_1_dp__AMUX CYDEV_IO_PRT_PRT15_AMUX
#define USBUART_1_dp__BIE CYDEV_IO_PRT_PRT15_BIE
#define USBUART_1_dp__BIT_MASK CYDEV_IO_PRT_PRT15_BIT_MASK
#define USBUART_1_dp__BYP CYDEV_IO_PRT_PRT15_BYP
#define USBUART_1_dp__CTL CYDEV_IO_PRT_PRT15_CTL
#define USBUART_1_dp__DM0 CYDEV_IO_PRT_PRT15_DM0
#define USBUART_1_dp__DM1 CYDEV_IO_PRT_PRT15_DM1
#define USBUART_1_dp__DM2 CYDEV_IO_PRT_PRT15_DM2
#define USBUART_1_dp__dp__MASK 0x40u
#define USBUART_1_dp__dp__PC CYDEV_IO_PC_PRT15_PC6
#define USBUART_1_dp__dp__PORT 15
#define USBUART_1_dp__dp__SHIFT 6
#define USBUART_1_dp__DR CYDEV_IO_PRT_PRT15_DR
#define USBUART_1_dp__INP_DIS CYDEV_IO_PRT_PRT15_INP_DIS
#define USBUART_1_dp__LCD_COM_SEG CYDEV_IO_PRT_PRT15_LCD_COM_SEG
#define USBUART_1_dp__LCD_EN CYDEV_IO_PRT_PRT15_LCD_EN
#define USBUART_1_dp__PORT 15
#define USBUART_1_dp__PRT CYDEV_IO_PRT_PRT15_PRT
#define USBUART_1_dp__PRTDSI__CAPS_SEL CYDEV_PRTDSI_PRT15_CAPS_SEL
#define USBUART_1_dp__PRTDSI__DBL_SYNC_IN CYDEV_PRTDSI_PRT15_DBL_SYNC_IN
#define USBUART_1_dp__PRTDSI__OE_SEL0 CYDEV_PRTDSI_PRT15_OE_SEL0
#define USBUART_1_dp__PRTDSI__OE_SEL1 CYDEV_PRTDSI_PRT15_OE_SEL1
#define USBUART_1_dp__PRTDSI__OUT_SEL0 CYDEV_PRTDSI_PRT15_OUT_SEL0
#define USBUART_1_dp__PRTDSI__OUT_SEL1 CYDEV_PRTDSI_PRT15_OUT_SEL1
#define USBUART_1_dp__PRTDSI__SYNC_OUT CYDEV_PRTDSI_PRT15_SYNC_OUT
#define USBUART_1_dp__PS CYDEV_IO_PRT_PRT15_PS
#define USBUART_1_dp__SLW CYDEV_IO_PRT_PRT15_SLW

/* Miscellaneous */
#define CYDEV_CHIP_REV_PANTHER_ES1 1
#define CYDEV_CHIP_DIE_PANTHER 2
#define CYDEV_CHIP_DIE_EXPECT CYDEV_CHIP_DIE_PANTHER
#define BCLK__BUS_CLK__HZ 48000000U
#define BCLK__BUS_CLK__KHZ 48000U
#define BCLK__BUS_CLK__MHZ 48U
#define CYDEV_BOOTLOADER_WAIT_COMMAND 1
#define CYDEV_BOOTLOADER_WAIT_TIME 10
#define CYDEV_CHIP_DIE_ACTUAL CYDEV_CHIP_DIE_EXPECT
#define CYDEV_CHIP_DIE_LEOPARD 1
#define CYDEV_CHIP_DIE_UNKNOWN 0
#define CYDEV_CHIP_JTAG_ID 0x0E13C069
#define CYDEV_CHIP_REV_EXPECT CYDEV_CHIP_REV_PANTHER_ES1
#define CYDEV_CHIP_REV_LEOPARD_ES1 0
#define CYDEV_CHIP_REV_LEOPARD_ES2 1
#define CYDEV_CHIP_REV_PANTHER_ES0 0
#define CYDEV_CONFIGURATION_ECC 0
#define CYDEV_CONFIGURATION_IMOENABLED 0
#define CYDEV_CONFIGURATION_MODE 0
#define CYDEV_DATA_CACHE_ENABLED 1
#define CYDEV_DEBUG_ENABLE_MASK 0x01
#define CYDEV_DEBUG_ENABLE_REGISTER CYDEV_MFGCFG_MLOGIC_DBG_DBE
#define CYDEV_DEBUGGING_DPS 2
#define CYDEV_DEBUGGING_ENABLE 1
#define CYDEV_DEBUGGING_REQXRES 1
#define CYDEV_DEBUGGING_XRES 0
#define CYDEV_ECC_ENABLE 0
#define CYDEV_INSTRUCT_CACHE_ENABLED 1
#define CYDEV_USB_CLK_OSC_LOCKING_ENABLED_AT_PWR_UP 
#define CYDEV_VDDA 5.5
#define CYDEV_VDDA_MV 5500
#define CYDEV_VDDD 5.5
#define CYDEV_VDDD_MV 5500
#define CYDEV_VIO0 5.5
#define CYDEV_VIO0_MV 5500
#define CYDEV_VIO1 5.5
#define CYDEV_VIO1_MV 5500
#define CYDEV_VIO2 5.5
#define CYDEV_VIO2_MV 5500
#define CYDEV_VIO3 5.5
#define CYDEV_VIO3_MV 5500
#define DMA_CHANNELS_USED__MASK0 0x00000000u
#define CYDEV_BOOTLOADER_ENABLE 0

#endif /* INCLUDED_CYFITTER_H */
