It is surprisingly easy to extract critical information from a computer chip by simply monitoring the amount of power that it consumes over time. These power side channels have been used time and time again to break otherwise secure cryptographic algorithms. Countless mitigation strategies have been used to thwart these attacks. Their effectiveness is difficult to measure since vulnerability metrics do not adequately consider leakage in a comprehensive manner. In particular, metrics typically focus on single instances in time, i.e., specific attack points, which severely underestimate information leakage especially when considering emerging attacks that target multiple places in the power consumption trace.
We developed a multidimensional metric that addresses these flaws and enables hardware designers to quickly and more effectively understand how the hardware that they develop is resistant to power side channel attacks. Our metric considers all points in time of the power trace, without assuming an underlying model of computation or leakage. This will enable the development of more secure hardware that is resilient to power side channel attacks. This work was recently published at the International Conference on Computer Aided Design (ICCAD), one of the premier forums for technical innovations in electronic design automation.
For further information see: Alric Althoff, Jeremy Blackstone, and Ryan Kastner, “Holistic Power Side-Channel Leakage Assessment: Towards a Robust Multidimensional Metric“, International Conference on Computer Aided Design (ICCAD), November 2019 (pdf)
Deep in the heart of the Peten Basin in Eastern Guatemala lies the ruins of the ancient Maya civilization. Jungles have overtaken these ancient cities, leaving archaeologists to painstakingly excavate their ruins in order to uncover their secrets about their culture, traditions, and rituals. This process is time-consuming and tedious; archaeologists carefully tunnel into the temples and other structures using pickaxes and shovels. They manually sift through the limestone remains in hopes of finding artifacts, tombs, ancient walls, masks, and murals and better understand the usage of these structures and artifacts. The result of this is hundreds of meters of man made tunnels that burrow deep into these structures and snake across multiple levels.
Dr. Quentin Gautier successfully defended his PhD thesis which focused on using modern technologies to better document these archaeological sites. His thesis documents is a series of 3D imaging prototypes, which can generate large-scale 3D models of Maya archaeological sites. Over the years, Quentin lead the development of several generations of scanning systems and he ventured on several expeditions deep in the the Guatemala jungle to deploy these systems. The result is an unprecedented amount of data collection, which has turned into impressive 3D models that are viewable in virtual reality and other 3D visualization systems.
Quentin’s PhD journey was much like these excavations. It was at times painstaking and tedious. He is an expert system builder and this often conflicted with the unfortunate publish-or-perish model of academics. He certainly could have focused on writing more papers on incremental ideas in lieu of developing real systems that were field tested and deployed. In the end, I believe his thesis will be more impactful than these unwritten papers. The excavation sites that he helped document are windows into our past, and many of these windows have been closed as the excavations have been backfilled in order to preserve these precious sites. Quentin’s digital models will allow archaeologists and others all over the world to view these cultural heritage treasures. His system development will help our research group’s continued efforts to use modern technologies to aid in scientific purposes. And his mentorship to the countless undergraduate students (like Giovanni below) will have lasting impacts on their careers.
Congratulations Dr. Gautier and best of luck in Japan! I look forward to seeing all of the amazing systems that you develop in the future.
When Siri, Alexa, Cortana, Google Assistant or your other favorite digital assistant talk to you, they rely on neural networks to create the audio file that speaks to you. WaveNet is a deep neural network for generating audio that provides amazingly accurate results. Yet, this process is slow and cannot be performed in real-time. Our FastWave hardware architecture accelerates this process providing a 10x decrease in the time required to generate the audio file as compared to a state of the art GPU solution. This is the first hardware accelerated platform for autoregressive convolutional neural networks.
FastWave is being presented at the International Conference on Computer-aided Design (ICCAD). ICCAD is one of the top conferences for topics related to hardware design automation. The paper was developed as a project in my CSE 237C class, which teaches hardware design and prototyping using high level synthesis. Shehzeen Hussain, Mojan Javaheripi, and Paarth Neekhara developed the initial idea as a final class project. They continued their work after class and the end result is the paper, FastWave: Accelerating Autoregressive Convolutional Neural Networks on FPGA.